Test VHDL code of half adder code on GHDL and GTKWave open simulator.

 Execute code

Go to notepad++ and select language v->vhdl  put halfadder code into file and save with ha.vhd

 --*******************Design under test************************
Library ieee; use ieee.std_logic_1164.all;

entity half_adder is
port(a,b:in bit; sum,carry:out bit);
end half_adder;

architecture data of half_adder is
begin
sum<= a xor b;
carry <= a and b;
end data;

--*****************test bench in same file*********************
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity half_adder_tb is
end half_adder_tb;

architecture behave of half_adder_tb is
component half_adder
port(a,b:in bit; sum,carry:out bit);
end component;

signal r_BIT1 : bit := '0';
signal r_BIT2 : bit := '0';
signal w_SUM : bit;
signal w_CARRY : bit;

begin

UUT1 : half_adder port map (a=>r_BIT1,b=>r_BIT2,sum=>w_SUM,carry=> w_CARRY);

process is
begin
r_BIT1 <= '0';
r_BIT2 <= '0';
wait for 10 ns;
r_BIT1 <= '0';
r_BIT2 <= '1';
wait for 10 ns;
r_BIT1 <= '1';
r_BIT2 <= '0';
wait for 10 ns;
r_BIT1 <= '1';
r_BIT2 <= '1';
wait for 10 ns;
assert false report "end of simulation";
wait;
end process;
end behave;

EDA playground link: Click here

Command to execute the code mentioned below:

Error checking
1) ghdl –s ha.vhd --for error in code. If no massage display no error.
2) ghdl –s ha_tb.vhd --for error in test bench. If no massage display no error.

Analyze
3) ghdl –a ha.vhd --for analyse code. If no massage display no error.
4) ghdl –a ha_tb.vhd --for analyse test bench. If no massage display no error.

Create executable
5) ghdl –e half_adder_tb --for create executable and we need to mention tb entity name.

Run executable
6) ghdl –r half_adder_tb --vcd=ha.vcd -- run and creat vcd file for half_adder.

Launch gtkwave
7) gtkwave ha.vcd --- launch gtkwave and vcd created for alf_adder_tb.

Waveform: